Michael Brown
649176cd60
Pretty much all physical machines and off-the-shelf virtual machines will provide a functional PCI BIOS. We therefore default to using only the PCI BIOS, with no fallback to an alternative mechanism if the PCI BIOS fails. AWS EC2 provides the opportunity to experience some exceptions to this rule. For example, the t3a.nano instances in eu-west-1 have no functional PCI BIOS at all. As of commit83516ba("[cloud] Use PCIAPI_DIRECT for cloud images") we therefore use direct Type 1 configuration space accesses in the images built and published for use in the cloud. Recent experience has discovered yet more variation in AWS EC2 instances. For example, some of the metal instance types have multiple PCI host bridges and the direct Type 1 accesses therefore see only a subset of the PCI devices. Attempt to accommodate future such variations by making the PCI I/O API selectable at runtime and choosing ECAM (if available), falling back to the PCI BIOS (if available), then finally falling back to direct Type 1 accesses. This is implemented as a dedicated PCIAPI_CLOUD API, rather than by having the PCI core select a suitable API at runtime (as was done for timers in commit302f1ee("[time] Allow timer to be selected at runtime"). The common case will remain that only the PCI BIOS API is required, and we would prefer to retain the optimisations that come from inlining the configuration space accesses in this common case. Cloud images are (at present) disk images rather than ROM images, and so the increased code size required for this design approach in the PCIAPI_CLOUD case is acceptable. Signed-off-by: Michael Brown <mcb30@ipxe.org>
58 lines
1.3 KiB
C
58 lines
1.3 KiB
C
#ifndef _IPXE_ECAM_H
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#define _IPXE_ECAM_H
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/** @file
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*
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* PCI I/O API for Enhanced Configuration Access Mechanism (ECAM)
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <ipxe/acpi.h>
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#include <ipxe/pci.h>
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/** Enhanced Configuration Access Mechanism per-device size */
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#define ECAM_SIZE 4096
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/** Enhanced Configuration Access Mechanism table signature */
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#define ECAM_SIGNATURE ACPI_SIGNATURE ( 'M', 'C', 'F', 'G' )
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/** An Enhanced Configuration Access Mechanism allocation */
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struct ecam_allocation {
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/** Base address */
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uint64_t base;
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/** PCI segment number */
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uint16_t segment;
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/** Start PCI bus number */
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uint8_t start;
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/** End PCI bus number */
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uint8_t end;
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/** Reserved */
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uint8_t reserved[4];
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} __attribute__ (( packed ));
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/** An Enhanced Configuration Access Mechanism table */
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struct ecam_table {
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/** ACPI header */
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struct acpi_header acpi;
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/** Reserved */
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uint8_t reserved[8];
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/** Allocation structures */
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struct ecam_allocation alloc[0];
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} __attribute__ (( packed ));
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/** A mapped Enhanced Configuration Access Mechanism allocation */
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struct ecam_mapping {
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/** Allocation */
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struct ecam_allocation alloc;
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/** PCI bus:dev.fn address range */
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struct pci_range range;
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/** MMIO base address */
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void *regs;
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};
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extern struct pci_api ecam_api;
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#endif /* _IPXE_ECAM_H */
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