[riscv] Add support for RDTIME as a timer source

The Zicntr extension defines an unprivileged wall-clock time CSR that
roughly matches the behaviour of an invariant TSC on x86.  The nominal
frequency of this timer may be read from the "timebase-frequency"
property of the CPU node in the device tree.

Add a timer source using RDTIME to provide implementations of udelay()
and currticks(), modelled on the existing RDTSC-based timer for x86.

Signed-off-by: Michael Brown <mcb30@ipxe.org>

src/arch/riscv/include/bits/errfile.h

@@ -16,6 +16,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
 
 #define ERRFILE_sbi_reboot	( ERRFILE_ARCH | ERRFILE_CORE | 0x00000000 )
 #define ERRFILE_hart		( ERRFILE_ARCH | ERRFILE_CORE | 0x00010000 )
+#define ERRFILE_zicntr		( ERRFILE_ARCH | ERRFILE_CORE | 0x00020000 )
 
 /** @} */